JPH0586662B2 - - Google Patents

Info

Publication number
JPH0586662B2
JPH0586662B2 JP58141319A JP14131983A JPH0586662B2 JP H0586662 B2 JPH0586662 B2 JP H0586662B2 JP 58141319 A JP58141319 A JP 58141319A JP 14131983 A JP14131983 A JP 14131983A JP H0586662 B2 JPH0586662 B2 JP H0586662B2
Authority
JP
Japan
Prior art keywords
plate
aln
power semiconductor
semiconductor module
alloy
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58141319A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6032343A (ja
Inventor
Masako Nakabashi
Kazumi Shimotori
Hiromitsu Takeda
Tatsuo Yamazaki
Makoto Shirokane
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP14131983A priority Critical patent/JPS6032343A/ja
Publication of JPS6032343A publication Critical patent/JPS6032343A/ja
Publication of JPH0586662B2 publication Critical patent/JPH0586662B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49866—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
    • H01L23/15—Ceramic or glass substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • H01L23/3731—Ceramic materials or glass
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01013—Aluminum [Al]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/0104—Zirconium [Zr]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Materials Engineering (AREA)
  • Ceramic Products (AREA)
  • Die Bonding (AREA)
JP14131983A 1983-08-02 1983-08-02 パワ−半導体モジユ−ル基板 Granted JPS6032343A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14131983A JPS6032343A (ja) 1983-08-02 1983-08-02 パワ−半導体モジユ−ル基板

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14131983A JPS6032343A (ja) 1983-08-02 1983-08-02 パワ−半導体モジユ−ル基板

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP6300702A Division JP2519402B2 (ja) 1994-12-05 1994-12-05 パワ―半導体モジュ―ル基板の製造方法

Publications (2)

Publication Number Publication Date
JPS6032343A JPS6032343A (ja) 1985-02-19
JPH0586662B2 true JPH0586662B2 (en]) 1993-12-13

Family

ID=15289145

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14131983A Granted JPS6032343A (ja) 1983-08-02 1983-08-02 パワ−半導体モジユ−ル基板

Country Status (1)

Country Link
JP (1) JPS6032343A (en])

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4847445A (en) * 1985-02-01 1989-07-11 Tektronix, Inc. Zirconium thin-film metal conductor systems
JPH0738423B2 (ja) * 1986-08-07 1995-04-26 昭和電工株式会社 混成集積回路基板及びその製造方法
JPH0738424B2 (ja) * 1986-08-07 1995-04-26 昭和電工株式会社 混成集積回路基板及びその製造方法
JP2573225B2 (ja) * 1987-02-10 1997-01-22 株式会社東芝 電子部品の製造方法
JP3011433B2 (ja) * 1990-05-25 2000-02-21 株式会社東芝 セラミックス回路基板の製造方法
JPH0497966A (ja) * 1990-08-09 1992-03-30 Ngk Spark Plug Co Ltd セラミック摺動部品の製造方法
JP3845925B2 (ja) 1996-02-05 2006-11-15 住友電気工業株式会社 窒化アルミニウム基材を用いた半導体装置用部材及びその製造方法
WO1998054761A1 (fr) 1997-05-26 1998-12-03 Sumitomo Electric Industries, Ltd. Substrat jonction de circuit en cuivre et procede de production de ce substrat
JP3794454B2 (ja) * 1998-09-16 2006-07-05 富士電機ホールディングス株式会社 窒化物セラミックス基板
JP2000335983A (ja) * 1999-05-28 2000-12-05 Denki Kagaku Kogyo Kk 接合体の製造方法

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5175972A (en) * 1974-12-26 1976-06-30 Ngk Insulators Ltd Seramitsukuno metaraijinguhoho
JPS5811390B2 (ja) * 1977-02-18 1983-03-02 株式会社東芝 熱伝導性基板の製造方法
EP0038584B1 (de) * 1980-04-21 1984-08-15 BBC Aktiengesellschaft Brown, Boveri & Cie. Mehrschichtiges Lot und Verfahren zu dessen Herstellung
JPS5848926A (ja) * 1981-09-18 1983-03-23 Hitachi Ltd 絶縁型半導体装置

Also Published As

Publication number Publication date
JPS6032343A (ja) 1985-02-19

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